1. Field of the Invention
This invention relates to a transistor amplifier circuit.
2. Description of the Prior Art
In Japanese Patent Application No. 14660/1973, entitled "Transistor amplifier circuit", as filed on Feb. 7, 1973, applicants have proposed a transistor amplifier circuit which diminishes the distortion factor without employing negative feedback.
According to the transistor amplifier circuit proposed formerly, as shown in FIG. 1, the base d.c. bias voltage V.sub.B of an amplifier transistor Q.sub.1 is set at a high value, whereby the magnitude of the d.c. emitter current I.sub.E is made large, to reduce the distortion factor dependent upon an emitter junction nonlinear resistance r.sub.e based on the base-emitter voltage V.sub.BE - versus - emitter current I.sub.E characteristic, and therewith, a constant-current circuit CS which is composed of a transistor Q.sub.3, a resistance R.sub.6 and diodes D.sub.3, D.sub.4 is connected in parallel with a load resistance R.sub.L connected to the collector electrode of the amplifier transistor Q.sub.1, whereby a d.c. voltage drop in the load resistance R.sub.L is compensated, to make possible a low supply voltage operation and a high gain amplification operation.
On the other hand, as is well known, unless the output d.c. voltage level V.sub.out(DC) of the transistor amplifier circuit is set at a value of about half the supply voltage V.sub.cc, namely, at a middle point potential (=1/2 V.sub.cc), the output waveform of the output signal V.sub.out will be clipped with its upper and lower amplitude values being asymmetric, so that a large amplitude operation becomes impossible and that the output dynamic range becomes narrow.
The output d.c. voltage level V.sub.out(DC) of the transistor amplifier circuit shown in FIG. 1 is given by the following, letting I.sub.RL be a d.c. bias current which flows through the load resistance R.sub.L : EQU v.sub.out(DC) = V.sub.cc - R.sub.L .sup.. I.sub.RL EQU = V.sub.cc - R.sub.L .sup.. (I.sub.E -I.sub.O)
in order to set the output d.c. voltage level at the middle point potential, therefore, it is necessary to precisely set the magnitude of the load resistance R.sub.L and the d.c. emitter current value I.sub.E as well as the value of the constant current I.sub.O to flow through the constant-current circuit CS. On the other hand, the voltage gain G.sub.V of such a transistor amplifier circuit is given by: EQU G.sub.V .apprxeq. R.sub.L /R.sub.E
accordingly, in actually designing such a transistor amplifier circuit, the magnitude of the load resistance R.sub.L must be set in consideration of both the output d.c. voltage level V.sub.out(DC) and the voltage gain G.sub.V, and a disadvantage is that the degree of freedom of circuit design is low.